HLÝSTÆKJATÆKI ADIN6310 Handbók fyrir notendur með tilvísunarhönnun fyrir vallarrofa

6-porta Ethernet rofi ADIN6310
- 2Gb trunk ports; SGMII by SMA or ADIN1300 by RGMII
- 4 spur 10BASE-T1L ports, ADIN1100 by RGMII
IEEE 802.3cg-compliant SPoE PSE controller, LTC4296-1
- Aflflokkur 12
- Power classification by SCCP (not enabled)
Arm® Cortex®-M4 microcontroller, MAX32690
- External flash and RAM
Zephyr hugbúnaðarverkefni með opnum hugbúnaði
- Óstýrður hamur með grunnrofa og PSE afli
- VLAN auðkenni 1-10 virk á öllum tengjum
- Rafmagn tengt við 10BASE-T1L snúru fyrir allar spur tengi
- DIP switch options to enable other features (Time Sync, LLDP, IGMP Snooping)
Managed mode using the switch evaluation package, TSN/Redundancy evaluations
- Tímabundið netkerfi (TSN)
- Áætluð umferð (IEEE 802.1Qbv)
- Rammaforkaup (IEEE 802.1Qbu)
- Á hverja straumsíun og löggæslu (IEEE 802.1Qci)
- Afritun ramma og útrýming fyrir áreiðanleika (IEEE 802.1CB)
IEEE 802.1AS 2020 time synchronisation
- Afritunargeta
- High availability seamless redundancy (HSR)
- Parallel redundancy protocol (PRP)
- Media redundancy protocol (MRP)

Host interface hardware strapping with jumpers, a choice of
- Single/Dual/Quad SPI interface
- 10Mbps/100Mbps/1000Mbps Ethernet port (Port 2/Port 3)
- SGMII/100BASE-FX/1000BASE-KX
- Header for direct SPI access (Single/Dual/Quad)
Scale port count by cascading by RJ45 or SGMII/1000BASE-KX/ 100BASE-FX

PHY strapping by surface-mount configuration resistors
- The default state is software power down for spur Ports
Switch vélbúnaðar stjórnar PHY aðgerðum yfir MDIO
- Virkar frá einni, ytri 9V til 30V spennugjafa
- LED indicators on GPIO, TIMER pins

MATSSETI INNIHALD

EVAL-ADIN6310T1LEBZ evaluation board
15V, 18W wall adapter with international adapters
5 x plug-in screw terminal connectors for 10BASE-T1L cable and external power supply

1x Cat5e Ethernet snúru

BÚNAÐAR ÞARF

Link partner with 10BASE-T1L interface

Link partner with standard Ethernet interface
Single pair cabling for T1L
Tölva með Windows® 11

SKJÖL ÞARF

ADIN6310 data sheet and UG-2280 og UG-2287 notendaleiðbeiningar
ADIN1100 gagnablað

ADIN1300 gagnablað
Gagnablað LTC4296-1
MAX32690 gagnablað

HUGBÚNAÐUR ÞARF

For TSN evaluation, install the ADIN6310 evaluation package

ALMENN LÝSING

This user guide describes the ADIN6310 Field switch evaluation board with support for four 10BASE-T1L spur ports and two standard Gigabit capable Ethernet trunk ports.

The hardware includes single-pair power over Ethernet (SPoE) LTC4296-1 circuit with optional serial communication classification protocol (SCCP) support.
The default operation of the hardware is an unmanaged mode where the MAX32690 Arm Cortex-M4 microcontroller configures the switch into a basic switching mode and the PSE is configured for Class 12 operation.
Enhance the unmanaged switch operation by the DIP switch (S4), which provides the ability to enable features such as time synchronisation, LLDP, or IGMP snooping by default.

Disable the PSE by using the DIP switch; default is enabled. For more extensive switch evaluation, refer to the TSN switch evaluation package available from the ADIN6310 product page.
This evaluation package provides ability to exercise the TSN functionality in addition to the Redundancy features.
Mynd 1 sýnir yfirview matsráðs.

VÆKNI LOKIÐVIEW

MATSSTJÓRN VÆKJA

RAFGIÐUR

Vélbúnaðurinn starfar frá einni, ytri, 9V til 30V spennulínu. 15V millistykki fylgir með í settinu.
Apply the wall adapter to P4 connector or 9V to 30V to the P4 connector. Alternatively, it is possible to supply power to the 3-pin connector, P3.
The LED DS1 lights up when power is applied to the board, indicating a successful power-up of the main power rails.

All power rails are provided by an on-board MAX20075 buck regu-lator and MAX20029 DC-DC converter.
These devices generate the four rails (3.3V, 1.8V, 1.1V, and 0.9V) required for operation of the ADIN6310 skipta, ADIN1100 og ADIN1300 PHYs, MAX32690 and associated circuitry.
The default nominal voltages are listed in Table 1, in addition to which rails are used for the different devices.

The LTC4296-1 is powered directly from the incoming supply on P3 or P4. By default, the PSE is configured to enable four ports with IEEE802.3 Class 12 operation.
If using the PSE with SCCP, increase the supply rail to the evaluation board to 20V minimum.
Einnig er hægt að knýja kortið með USB tengi P2 til að veita +5V spennu með P8 tengibúnaði ísettum. Þar sem PSE virkar frá lágmarki +6V, má ekki nota USB tengið ef PSE notkun er nauðsynleg.

Tafla 1. Sjálfgefin stilling aflgjafa tækis

1 N/A þýðir að á ekki við.
Connector P5 provides probe access to the individual power supplies and, when inserted, connects the supply rails to the circuit. P5 must have links inserted across VDD3P3 (3-4), VDD1P8 (5-6), VDD1P1 (7-8) and VDD0P9 (9-10).

Tafla 2 sýnir yfirview of the current consumption for the switch and PHYs for various operating modes. The MAX32690 is held in reset for these measurements; the LTC4296-1 is not enabled.

Tafla 2. Hvíldarstraumur stýrðrar stillingarkorts (TSN matsforrit)

Tafla 2. Managed Mode Board Quiescent Current (TSN Evaluation Application) (Continued)

Tafla 3 shows a summary of the current consumption of the board for the unmanaged operation where MAX32690 enables the switch and the PSE provides power to the end device over the single pair.
Table 3. Unmanaged Mode Board Quiescent Current (MAX32690 Configures)

S4 DIP switch is in default configuration (all OFF) for basic switch configuration and PSE providing power.
DEMO-ADIN1100D2Z stjórn.
PSE port supplies power to the board, and the power depends on the hardware.

POWER RÖÐUN

Engar sérstakar kröfur eru gerðar um röðun aflgjafa fyrir tækin. Matskortið er stillt til að tengja aflgjafateinana saman.

STARFSHÆTTIR MATSNEFNDAR

Það eru þrjár almennar stillingar til að nota vélbúnaðinn. Fyrsta stillingin er sjálfgefin aðgerð, sem er óstýrð stilling. Í þessari stillingu stillir MAX32690 örstýringin ADIN6310 rofann og LTC4296-1, bæði yfir SPI tengi.
The second mode is for TSN evaluation. In this mode, the ADI TSN evaluation application is used to interface to the switch over an Ethernet-connected Host interface through Port 2.
The TSN evaluation package provides a PC based web server and allows users to interact with all the TSN and Redundancy features of the switch.

The TSN evaluation package does not support configuration of the PSE. In this use case, use the other ports on the board to evaluate the capability of the ADIN6310, establish links with other link partners and evaluate TSN capability and 10BASE-T1L.
For more details on this mode, see the Managed Configuration and TSN section.
Þriðja rekstrarstillingin felur í sér að notandinn tengir eigin hýsingarvél við SPI tengi rofans í gegnum P13/P14 haus og notar til að flytja rofadrifið yfir á sinn vettvang.

ENDURSTILLING BORÐS

The push button S3 provides user the ability to reset the ADIN6310 and optionally the MAX32690. P9 must be inserted in position (1-2), for the reset button to also reset the MAX32690.
Pushing the reset button does not reset the 10BASE-T1L PHYs or the Gigabit PHYs directly, but the subsequent initialisation of the switch causes the PHYs to reset.

STOPPA OG ROFA VALKOSTIR

ADIN6310 Hýsingarhöfn

The ADIN6310 switch supports the Host control over SPI or any of the six Ethernet ports. Configure the Host interface to be Port 2, Port 3, or SPI.

The Host port and Host port interface selection are configured using jumpers inserted in the P7 header on the
nets labelled TIMER0/1/2/3, SPI_SIO, and SPI_SS.
The Timer and SPI pins have internal pull-up/-down resistors, as shown in Table 4. The strapping jumpers on the evaluation board provide user with the ability to reconfigure the strapping to select an alternative Host interface.

For more details on all options available, refer to the section on Host strapping in the ADIN6310 data sheet. Overcome the internal pull-up/-down strapping resistors with the external resistor by inserting the strapping jumper.
Þegar engar spennutengingar eru settar inn er Host-viðmótið stillt fyrir staðlaða SPI. Þetta er einnig sjálfgefin stilling fyrir vélbúnaðinn við afhendingu. Breytingar á spennutengingu Host krefjast þess að slökkt sé á tækinu til að það taki gildi.

Tafla 4. Val á tengifleti fyrir hýsilband

PU = Pull-Up, PD = Pull-Down.
MAX32690 is configured for a single SPI interface. 3 Use with the TSN evaluation application.

Table 5. Host Port Selection

Use with the TSN evaluation application.
Nokkrir tengilásarar á matsborðinu verða að vera stilltir fyrir nauðsynlega rekstraruppsetningu áður en borðið er notað til mats. Sjálfgefnar stillingar og virkni þessara tengilása eru sýndar í töflu 6.

ADIN1300

GPIO OG TIMER HEADAR
Tengipunktur (P18 og P17) er til staðar til að fylgjast með öllum tímastilli- og almennum inntaks-/úttaksmerkjum (GPIO). Auk tengipunktsins eru einnig LED-ljós á þessum pinnum.
Í óstýrðum ham er TIMER0 notað sem truflunarmerki til MAX32690 SPI viðmótsins.

When S4 DIP switch is configured to enable time synchronisation, the default configuration for TIMER2 is a 1PPS (one pulse per second) signal and the user can see a blink at a 1-second rate. Similarly, when using the ADI Evaluation software package, the TIMER2 pin is configured for a 1PPS signal by default.

LED ON BORD

The board has one power LED, DS1, that lights up to indicate a successful power-up of the board supply rails. The MAX32690 circuit has a bi-colour LED, D6, currently not used.
There are eight LEDs associated with the ADIN6310 Timer and GPIO functions; link P19 must be inserted to see activity on these LEDs. The TIMER2 pin has a 1PPS signal enabled by default if time synchronisation is enabled.

10BASE-T1L PHY LED ljós

Þrjár LED-ljós eru tengdar hverri 10BASE-T1L tengi, eins og sýnt er í töflu 7.

Tafla 7. Notkun 10BASE-T1L LED ljóss

PHY-band og stillingar

PHY-vistfang
PHY vistföngin eru stillt með sampling the RXD pins after power-on, when they come out of reset. External strapping resistors are used on the board to configure each PHY with a unique PHY address. The default PHY addresses assigned to the devices is shown in Table 8.
Tafla 8. Sjálfgefin PHY vistfang

PHY spennubönd
There are two ADIN1300 devices on this evaluation board, connected to Port 2 and Port 3 of the switch. Either port is capable of being a Host interface to the switch, so these PHYs must be capable of bringing a link up independent of configuration from the switch. Both PHYs are hardware-strapped for 10/100 HD/FD, 1000 FD leader mode, RGMII no delays, and Auto-MDIX prefer MDIX, allowing them to establish a link with a remote partner. See Table 9. The ADIN1100 PHYs use the default strapping, as shown in Table 10.

Tafla 9. ADIN1300 PHY tengistillingarTafla 10. ADIN1100 PHY tengistillingar

PHY tengistöðupólun

Note that the ADIN1100 and ADIN1300 LINK_ST output pins are active high by default, whereas the Px_LINK input of the ADIN6310 defaults active low; therefore, the hardware includes an inverter in the path between each of the PHY LINK_ST and the
Px_LINK of the switch. If component space/cost is a concern, it is possible to avoid including this inverter and rely on a parameter passed as part of the switch configuration to change the PHY polarity as part of the initial configuration.
This software inversion of the link polarity is supported only for ADI PHY types.
In the event a PHY is used in the Host interface path to the switch, the link signal provided to the Host port must always be active low, so an inverter must be required for this port.

Tenglaval/SGMII stillingar

The switch has a per-port digital input (Px_LINK). When driven low, this tells the switch that port is enabled.
Port 2 and Port 3 can optionally be configured for SGMII, 1000BASE-KX, or 100BASE-FX mode.
When using these ports in SGMII modes, the corresponding link jumper (P10 for Port 2, P16 for Port 3) must be connected into the SGMII position.
This pulls the Px_LINK of the port low, which enables the port. For SGMII mode, ensure that the autonegotiation is disabled (false).
SGMII mode is not currently supported with the unmanaged configuration from the MAX32690 firmware.
Configure this mode if modifying the MAX32690 configuration directly, when using TSN evaluation package or when connecting your own Host to the device.

ADIN1300 Link Status Voltage Lén

The ADIN1300 LINK_ST is primarily intended to drive the switch link signal; therefore resides on the VDDIO_x voltage lén (sjálfgefið binditage rail is 1.8V). If using the LINK_ST pin to drive an LED to indicate link active, a level shifter is used to provide voltage and drive capability for the LED function. The LED anode is tied to 3.3V through a 470Ω resistor.

MDIO VITI

The MDIO bus of the ADIN6310 connects to the MDIO bus of each of the six PHYs on the evaluation board. The configuration of the PHYs is done by the switch firmware by this MDIO bus.

VIÐMÓT SWITCH SWD (P6)

Þetta viðmót er ekki virkt.

10BASE-T1L KAPALTENGING

Connect the 10BASE-T1L cables by a pluggable screw terminal block for each port. If more of the pluggable connectors are needed for easy connecting or changing of cables, purchase additional con-nectors from vendors or distributors, such as, Phoenix
Contact, Part Number 1803581, which is a pluggable, 3-way, 3.81mm, 28AWG to 16AWG, 1.5mm2 screw terminal block.

JARÐTENGINGAR

The board has an Earth node. Although this node may or may not be electrically connected to Earth ground, in a real device, this node is typically connected to the device’s metal housing or chassis.
Connect this Earth node as required in a wider demonstration system by the Earth terminal of the power supply connector, P3, or by an exposed metal plating of four mounting holes in the corners of the board.
For each port, disconnect the shield of the 10BASE-T1L cable from this Earth node, connected directly, or connect by a 4700pF capacitor (C1_x).
Select the required connection by the relevant link position of P2_x. Connect the Earth connection and metal body of the two RJ45 connectors (J1_2, J1_3) directly to the Earth node.
Connect the local circuit ground and the external power supply (except the Earth terminal, P3) to the Earth node by approximately 2000pF of capacitance and approximately 4.7MΩ of resistance.
Athugið að borðið hefur eingöngu verið hannað sem matsborð. Það hefur hvorki verið hannað né prófað með tilliti til rafmagnsöryggis. Allur búnaður, tæki, vírar eða kaplar sem tengjast þessu borði verða að vera varðir og öruggir til snertingar án hættu á raflosti.

SPOE afltenging

The circuit includes the five-port LTC4296-1, power supply equip-ment (PSE) controller, which can provide power over data line (PoDL)/single-pair power over Ethernet (SPoE).
The PSE controller supports powering the four T1L ports and the circuit is designed for PSE Class 12. One port of the PSE device is unused.
Note that a 20 to 30 V power supply is required to operate SPoE at Class 12; the provided 15 V power supply is not compliant with this power class.
The PSE controller is powered by default through the P3 or P4 connector, which supports up to 30V. To use the PSE controller for power classes other than Class 12 requires circuit modifications to the high-side, low-side sense resistors, and high-side MOSFET.
For details on the circuit modifications needed for the different power classes, refer to the LTC4296-1 data sheet.
BinditagHægt er að uppfylla kröfur fyrir aðra flokka með því að fjarlægja P25 tengibúnaðinn og veita nauðsynlegt magn.tage through the P24 connector.
This allows the PSE controller to be powered up to 55V.
The PSE controller circuit also includes circuit support for SCCP for purpose of classifying the power for a powered device (PD) at the end node side.
This uses the microcontroller GPIO pins for SCCP to communicate with the connected PD. SCCP is not enabled as part of the unmanaged/managed mode; example code for SCCP is included in the Zephyr project.
Using SCCP, information on the device class, type, and pd_faulted is obtained before power is applied to the cable. To use SCCP, increase the input voltage to the board to 20V minimum.
For additional details on SCCP protocol and use, refer to the LTC4296-1 data sheet and associated user guide.

MAX32690 MICROCONTROLLER

The MAX32690 is an Arm Cortex-M4 microcontroller designed for industrial and wearable applications. For this reference design, the MAX32690 is used to configure the switch and the PSE controller.
Associated with the MAX32690 circuit is external 1Gb of DRAM, 1Gb FLASH Memory, and a MAXQ1065 security device, which is planned to use in future versions.

Firmware on MAX32690

There is firmware installed on the MAX32690, which supports a basic configuration of the switch and PSE controller. For more details, see the Managed vs. Unmanaged section.

UART and SWD Interfaces

Connector P20 provides access to the MAX32690 serial interface. P1 provides access to the UART interface.

MAXQ1065 CRYPTOGRAPHIC CONTROLLER

The MAXQ1065 is an ultra-low-power security cryptographic controller with ChipDNA™ for embedded devices that provides turnkey cryptographic functions for root-of-trust, mutual authentication, data confidentiality and integrity, secure boot, and secure firmware update.
It provides secure communications with generic key exchange and bulk encryption or complete TLS support. It is planned to enable in future updates for encryption purposes.

Stýrt á móti óstýrðu

ÓSTJÓRNAÐAR SAMSKIPANIR

Unmanaged configuration relies on the MAX32690 configuring the ADIN6310 switch and the LTC4296-1 PSE controller to a basic configuration.
The MAX32690 has firmware loaded to enable the switch configuration based on the positions of the S4 DIP switch, and that runs this configuration after power-up.
Sjálfgefin stilling fyrir vélbúnaðinn er óstýrður hamur.
In unmanaged mode, all links from jumpers P7 and P9 are open. When P7 is open, this configures the switch to use SPI as the Host interface and P9 open enables the MAX32690 to run the loaded firmware to configure the switch and PSE.
The switch is configured for basic switching functionality, including VLAN IDs (1-10) with all ports enabled and configured as follows:
- Port 0, Port 1, Port 4, Port 5: RGMII, 10Mbps
- Port 2, Port 3: RGMII, 1000Mbps

Tafla 11. Staðsetningar tengibúnaðar fyrir óstýrðan ham

Switch S4 provides user ability to enable additional functionality for the ADIN6310, namely time synchronisation (IEEE 802.1AS 2020), link layer discovery protocol (LLDP), and IGMP snooping. Table 12 shows the possible combinations and the functionality for each configuration. Note that the corresponding GPIO pins are sampled on power up, therefore, changes to S4 configuration require a power cycle.

Tafla 12. Stillingar DIP-rofa S4

Note that other TSN functionality or SGMII interface is not supported in unmanaged mode, but available if using managed mode. The PSE configuration is carried out by the MAX32690 firmware, which enables the LTC4296-1 device over SPI.
The LTC4296-1 circuit is configured for 4 channels of PSE Class 12. When the PSE controller supplies voltage við T1L tengi, þá lýsir bláa aflgjafa-LED-ljósið fyrir það tengi.

STJÓRNAÐAR SAMSKIPTUN OG TSN

Managed mode for this reference design provides the user the ability to evaluate the broader capability of the ADIN6310 device, including TSN and Redundancy capability.
Managed mode relies on the use of ADI’s TSN evaluation package (application and web server that runs on a Windows 10 PC con-nected to the switch over Ethernet Port 2 or Port 3). The default Host interface is Port 2.
Til að nota stýrðan ham með matspakkanum skal ganga úr skugga um að tenglarnir séu settir inn í P7 til að stilla Host-viðmótið fyrir valinn tengi, sjá ADIN6310 Host Port Strapping.
Ef PSE stjórntækið er ekki nauðsynlegt, þá setjið P9 í stöðu 2-3 til að halda MAX32690 í endurstillingu.
Virkjaðu RGMII tengin þegar matspakkinn er notaður.

Tafla 13. Stöður tengibúnaðar fyrir stýrðan ham

Hugbúnaður til að meta rofa TSN

Hugbúnaðurinn fyrir matspakkann er fáanlegur til niðurhals af vörusíðu ADIN6310.
The evaluation package contains the Windows-based evaluation tool and PC based web netþjónn fyrir stillingu rofans (og PHY-a).
This package supports TSN functionality and Redundancy capability and is used for evaluation of the switch.
This package does not support operation with the MAX32690 or LTC4296-1. A user can view individual switch port statistics, add and remove static entries from the look-up table, and configure TSN features through web síður sem veittar eru af web server running on the PC. Once cthe configuration is complete, user applications can communicate with other devices over the TSN network.
Alternatively, the user can configure the device for Redundancy features such as HSR or PRP.

Stýrt á móti óstýrðu
Viðeigandi notendahandbók (UG-2280) er einnig fáanleg á vörusíðu ADIN6310.

ses-stillingar File

Þegar matspakkinn er notaður byggist ADIN6310 stillingin á stillingartexta file, as shown in Figure 4. The hardware-specific parameters are passed from an xml file sem er að finna í hverju file system, see Figure 5.
The configuration is specific to the hardware being used. Edit the ses-configuration.txt file að passa við vélbúnaðinn með því að breyta XML fileeins og sýnt er á mynd 4.
Then, launch the application to start configuring the switch.
Use the XML file name eval-adin6310-10t1l-rev-c.xml the field switch evaluation board, this configuration applies to all hardware revisions from REV C onward, which uses RGMII interface for all Ethernet PHYs.
XML file eval-adin6310-10t1l-rev-b.xml samsvaraði eldri útgáfu af vélbúnaði sem notaði RMII viðmót fyrir ADIN1100 PHY. Nánari upplýsingar um notkun þessa hugbúnaðar er að finna í notendahandbókinni (UG-2280) á vörusíðu ADIN6310.

TSN SWITCH DRIVER BÓKASAFN

The driver package contains the ADIN6310 switch APIs used for configuration of the switch and all its functionality.
The software is C source code and OS agnostic. Port this package to different platforms to interact with the switch and provide access to all the features currently exposed in the switch.
The driver package is available to download from the ADIN6310 product page and must be consulted with the user guide (UG-2287).
When using the driver APIs, the port configuration is specific to the hardware configuration. For this field switch reference design, the following snippet of code shows the port initialisation structure specifically for this board.
This structure is passed to the SES_Ini-tializePorts() API during the initialisation of the switch. For more details on the sequence of API calls, refer to the user guide (UG-2287).
The structure caters for the different PHY configurations and speeds. This version of hardware uses 2 x ADIN1300 PHYs on Port 2 and Port 3 and 4 x ADIN1100 PHYs on Port 0, Port 1, Port 4, and Port 5.
All PHYs are connected over RGMII interface. This version of hardware uses an inverter in the path from PHY to switch link input, uses external PHY address strapping resistors (phyPullupCtrl).
Þegar ADIN1100 PHY eru stilltir hefur sjálfvirka samningabreytan engin áhrif á sjálfvirka samningamöguleika PHY.

Stýrt á móti óstýrðu

FRUMSKÓÐI FYRIR MAX32690

The source code project is available on GitHub on the ADI Zephyr fork at the GitHub. The ADIN6310 exampVerkefnið er staðsett í samples/application_development/adin6310, under the adin6310_switch branch.
The TSN driver library for the switch is not included in the branch; therefore, add the source code separately when building the project. The TSN driver library is available as a download directly from the ADIN6310 product page.
Þetta Zephyr verkefni styður marga týndaamples based on the hardware configuration of the DIP switch S4 as described in Table 12. The default configuration for the hardware is for the MAX32690 processor to run firmware to configure the ADIN6310
Ethernet switch over the SPI Host interface into a basic switching mode with VLAN ID 1-10 enabled for learning and forwarding on all ports, and for the LTC4296-1 PSE to be enabled on all ports. SCCP is not enabled, but an exampVenjan er innifalin í Zephyr kóðanum.

AÐ SETJA VERKEFNIÐ SAMAN
Til að þýta verkefnið skaltu keyra eftirfarandi:

Þar sem DLIB_ADIN6310_PATH er slóðin að hugbúnaðarpakkanum fyrir ADIN6310 TSN bílstjórann.

BLAKKAR TAFIÐ
Tengi P20 veitir aðgang að MAX32690 SWD viðmótinu. Eftir því hvaða villuleitarmælir er notaður getur örstýringin verið forrituð, eins og sýnt er í eftirfarandi köflum.

Segger J-Link

Það eru tvær leiðir til að hlaða inn vélbúnaðarforritinu með Segger J-Link. Í fyrsta lagi skaltu ganga úr skugga um að J-Link hugbúnaðarverkfærakeðjan sé uppsett (fáanleg frá Segger). website) og er aðgengilegt frá PATH breytunni (bæði fyrir Windows og Linux), þá skaltu gera eitt af eftirfarandi:

Alternatively, the user can use the JFlash (or JFlashLite) Utility:
Open JFlashLite and select the MAX32690 MCU as the target.
Then, program the .hex file located at the build/Zephyr/Zephyr. hex path (in the Zephyr directory). The firmware executes after a successful load.

MAX32625 PICO

Firstly, the MAX32625 PICO board must be programmed with the MAX32690 image available from Github. This PICO programmer offers direct access to the microcontroller memory, which allows the user to flash hex filemeð meiri sveigjanleika. Það eru tvær leiðir til að forrita hex-kóðann fyrir vélbúnaðinn. file í MAX32690.

The first approach is the simplest and does not require additional installations. Similar to most DAPLink interfaces, the MAX32625PI-CO board comes preinstalled with a bootloader that enables driver less drag-and-drop updates. This allows users to use the MAX32625PICO board as a tiny, embeddable development platform. The following steps guide how to flash the firmware onto the MAX32690 device:

Connect the MAX32625PICO board to the Field switch board P20 connector.
Connect the target board to a power source, connect the MAX32625PICO debug adapter to the Host machine.
Drag and drop the hex file from the build step onto the DA-PLINK drive to load new firmware into the board. The firmware executes after a successful load.

The alternative approach to flashing using the PICO board using

The West Command requires the user to use a custom version of OpenOCD. The easiest method of getting this version of Open-OCD is to install the MaximSDK using the automatic installer available at MaximSDK. Ensure that the Open On-Chip Debugger is enabled in the Select components window during installation (it is by default). After MaximSDK is installed, OpenOCD is available at the Max-imSDK/Tools/OpenOCD path. Program the MAX32690 now by using west. Run the following in the terminal (must be the same from which a user previously compiled the project): Breyttu slóðinni að grunnmöppunni fyrir MaximSDK eftir því hvar hún var áður sett upp.

AÐ KEYRA VÉLBÚNAÐINN
Eftir forritun keyrir vélbúnaðarmyndin sjálfkrafa. Örstýringin skráir stöðu stillinganna í gegnum UART (115200/8N1, engin jöfnuður). Með kembiforriti tengt og með notkun á skjáborðsforriti eins og Putty, þegar S4 DIP-rofinn er í stöðu 1111, birtist eftirfarandi úttak:

ZEPHYR SETTING UP GUIDE

First-time users of the Zephyr, refer to the Zephyr setting up guide located at Zephyr setting up guide

CASCADING PLATTUR

Það er mögulegt að keðja saman mörg borð til að auka fjölda porta með því að nota annað hvort óstýrða stillingu með stöðluðum Ethernet tengingum, eða með því að nota TSN matspakkann yfir annað hvort RGMII eða SGMII.
CASCADING MEÐ ÓSTJÓRNAÐRI stillingu

When operating in the unmanaged configuration Port 2 and Port 3 are operating as 1Gb trunk ports.Use these ports to cascade boards to increase the port count. As SPI is selected as the Host, connect Port 2 or Port 3 to either Port 2 or Port 3 on the next board in the chain.

KEÐRASAMSKIPTUN MEÐ STJÓRNAÐRI stillingu
Using RGMII Host Interface
When using the TSN evaluation package (PC application and web server) with Port 2 and Port 3 in RGMII mode, the corresponding link jumper (P10 for Port 2, P16 for Port 3) must be connected into the PHY LINK_ST position. In the managed configuration, configure the Port 2 or Port 3 as the Host interface using the P7 jumper positions. The configuration shown in Table 13 configures Port 2 as the Host interface. In this case, cascading boards to increase the port count, Port 2 of the first board must be connected to the Host PC running the Windows TSN evaluation application. Port 3 is connected to Port 2 of the next board in the chain, and so on. The TSN evaluation package can configure multiple switches in a chain, up to ten max. For more details, refer to the user guide

(UG-2280). Ensure that the ses-configuration.txt file vísar á viðeigandi xml stillingu file eins og rætt er um í ses-stillingunni File kafla.

Að nota SGMII til að kaskaða

The ADIN6310 switch supports four ports configured with SGMII modes, however, the evaluation board hardware supports configuration of SGMII modes for Port 2 and Port 3 only. SGMII modes of operation are not supported in the unmanaged mode. User can modify the Zephyr project code to use SGMII modes if required. Enable the SGMII modes by using the TSN evaluation package, where you configure Port 2 and Port 3 for SGMII, 100BASE-FX, or 1000BASE-KX mode. If Port 2 or Port 3 are used in SGMII mode, ensure to connect the corresponding link jumpers (P10 for Port 2, P16 for Port 3) into the SGMII position. When using SGMII mode between ADIN6310 devices, disable the autonegotiation as this is a MAC-MAC interface.
SGMII mode is not currently supported with the unmanaged config-uration.

ESD varúð
ESD (electrostatic discharge) viðkvæmt tæki. Hlaðin tæki og rafrásir geta tæmdst án þess að greina. Þrátt fyrir að þessi vara sé með einkaleyfi eða sérverndarrásir, getur skemmdir orðið á tækjum sem verða fyrir háorku ESD. Þess vegna ætti að gera viðeigandi ESD varúðarráðstafanir til að koma í veg fyrir skert frammistöðu eða tap á virkni.

Lagaskilmálar

By using the evaluation board discussed herein (together with any tools, components, documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analogue Devices Standard Terms and Conditions of Sale shall govern.
Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement.
This Agreement is made by and between you (“Customer”) and Analogue Devices, Inc. (“ADI”), with its principal place of business at One Analogue Way, Wilmington, MA 01887-2356, U.S.A. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY.
Viðskiptavinur skilur og samþykkir að matsráðið sé veitt í þeim eina tilgangi sem vísað er til hér að ofan og samþykkir að nota matsráðið ekki í öðrum tilgangi.
Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants.
The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY.
This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason.
Þegar notkun matsráðsins er hætt eða samningi þessum er hætt, samþykkir viðskiptavinur að skila matsnefndinni tafarlaust til ADI.
ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board.
Customer shall inform ADI of any damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Breytingar á matsráðinu verða að vera í samræmi við gildandi lög, þar á meðal en ekki takmarkað við RoHS tilskipunina.
TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time.
LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT.
ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT.
Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW.
Samningur þessi skal lúta og túlkaður í samræmi við efnislög Commonwealth of Massachusetts (að undanskildum lagareglum).
Allar lagalegar aðgerðir varðandi þennan samning verða teknar fyrir í ríki eða alríkisdómstólum sem hafa lögsögu í Suffolk County, Massachusetts, og viðskiptavinur lýtur hér með persónulegri lögsögu og varnarþingi slíkra dómstóla.
The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. All Analogue Devices products contained herein are subject to release and availability.

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HLÝSTÆKNI ADIN6310 VIÐMIÐUNARHÖNNUN RAFRÆÐIS [pdf] Handbók eiganda
ADIN6310, ADIN1100, ADIN1300, LTC4296-1, MAX32690, ADIN6310 Tilvísunarhönnun reitaskipta, ADIN6310, Tilvísunarhönnun reitaskipta, Tilvísunarhönnun rofa, Tilvísunarhönnun

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HLÝSTÆKNI ADIN6310 VIÐMIÐUNARHÖNNUN RAFRÆÐIS

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